Tue, 26 May 2015 08:00:00 EDTA receiving circuit, use, and method for receiving an encoded and modulated radio signal is provided. The circuit comprise a demodulator and a digital filter connected downstream of the demodulator for moving averaging. The filter has at least two FIFO registers and subtractors. Whereby for subtracting an output value of the FIFO register from an input value of the FIFO register a subtractor is connected to each FIFO register. Wherein the filter has a weighting unit, which is connected downstream of each FIFO register, and wherein the filter has an integrator, which is connected downstream of the subtractors for integration.
Tue, 19 May 2015 08:00:00 EDTA demapping scheme, having a low computational cost, suitable for any transmission in which only exhaustive demapping can guarantee good performance. The scheme, proposed in this document, can be used in any transmission based on no differential modulation. For example the proposed scheme can be directly applied to a transmission on flat fading AWGN channels or to a transmission on frequency selective channels after equalization or on each sub-carrier of an OFDM System. The proposed solution can be applied for the demapping of any communication system. The proposed scheme can be used for rotated and un-rotated constellation.
Tue, 28 Apr 2015 08:00:00 EDTA complex intermediate frequency mixer (IFM) for frequency translating a received complex intermediate frequency, IF, signal, wherein the received complex IF signal comprises at least two frequency bands located at upper-side and lower-side of 0 Hz, is provided. The complex intermediate frequency mixer comprises a first, second, third and fourth mixer (M1, M2, M3, M4). The complex intermediate frequency mixer further comprises a first, second, third and fourth gain adjusting component (α1, α2, δ2, δ1), connected to a first, second, third and fourth mixer output (M1-out, M2-out, M3-out, M4-out), respectively. Moreover, a first summing unit (S1), connected to a first gain output (α1-out), a fourth gain output (δ1-out) and a third mixer output (M3-out) negated, and second summing unit (S2), connected to the second gain output (α2-out), the third gain output (δ2-out) and the fourth mixer output (M4-out), are configured to output a first baseband complex signal of the received complex IF signal.
Tue, 14 Apr 2015 08:00:00 EDTMethods, apparatuses, and systems are provided for generating a candidate search set for ML detection of 2n-QAM signals transmitted on two or more MIMO spatial streams. A method includes estimating an initial solution yq for a received 2n-QAM symbol value b0b1 . . . bn-1, wherein all possible 2n-QAM symbol values are Gray-mapped constellation points; and performing an iteration for each hypothetical value of each bit position i of the initial solution yq, wherein each iteration comprises: determining a search center as: if ith bit of the initial solution equals the hypothetical value assumed for the current iteration, the initial solution yq; or if ith bit of the initial solution does not equal the hypothetical value assumed for the current iteration, a mirror constellation point yqc to the initial solution yq; and searching outward from the determined search center for candidate constellation points.
Tue, 14 Apr 2015 08:00:00 EDTApparatus, and associated method, for improving packet data communications upon a communication path including a radio-link. Determination is made of the conditions on the radio-link when selecting the optimal size of a transmission window within which to transmit packets of data. And, retransmission time-out values are also selected responsive to the indications of the radio-link conditions.
Tue, 31 Mar 2015 08:00:00 EDTA radio receiver comprising: an antenna for receiving a radio frequency signal amplitude modulated with an audio frequency signal; a digitizer for periodically sampling the radio frequency signal and generating a digital reception signal representative of the amplitude of the radio frequency signal; and a demodulator for demodulating the digital reception signal to generate a representation of the audio frequency signal.
Tue, 24 Mar 2015 08:00:00 EDTA demodulator including a delay line adapted for receiving an input signal at an input frequency, phase or frequency modulated by symbols with a duration equal to a period of the input signal or very close to that period. The delay line has Nd outputs producing Nd signals at the input frequency but with Nd different delays offset by ΔT relative to one another, Nd being an integer number greater than or equal to 1. The demodulator also includes a register of Nd latches each receiving a respective output of the delay line and a clock signal which is the input signal, in order to store the state of the outputs of the delay lines at the end of a period of the clock signal in the register. The content of the register represents a value of an input signal modulation symbol.
Tue, 17 Feb 2015 08:00:00 ESTThe disclosed fixing pressure member has a simple structure, is produced through simplified production processes, causes no problem due to continued use thereof, and exhibits excellent durability. Also disclosed is a method for producing such. The fixing pressure member employed in a fixing unit of a fixing device includes a sliding sheet having a sliding surface which slides with respect to the inner peripheral surface of a belt of the fixing unit, and an elastic member provided inside the sliding sheet. The sliding sheet is formed of a resin fiber woven fabric, a resin fiber knitted fabric, a resin nonwoven fabric, or a resin film. The elastic member and sliding sheet are formed through integral molding such that the elastic member is bonded to at least the inner surface of the sliding sheet opposite the sliding surface. The sliding surface has thereon an embossment formed through an embossing process.
Tue, 06 Jan 2015 08:00:00 ESTA device receives ASK signals by using an ASK signal receiving circuit that is different from an ASK signal receiving circuit for R/W mode, when an NFC-enabled semiconductor device operates in a mode other than the R/W mode. An ASK signal receiving circuit for 100% ASK is provided on the side of a pair of transmitting terminals. This arrangement eliminates the influence of an ESD provided within an ASK signal receiving circuit for 10% ASK coupled to a pair of receiving terminals. There is no need for management of threshold values that are different according to type of ASK and it is possible to support different modulation schemes by a smaller circuit configuration.
Tue, 30 Dec 2014 08:00:00 ESTA system and method including a parity bit encoder for encoding each n bits of data to be transmitted with a parity check bit to produce blocks of n+1 bits (n information bits plus one parity bit associated with the n information bits). Each of the blocks of n+1 bits are Gray mapped to a plurality of associated QAM symbols that are modulated onto an optical wavelength and transmitted to a receiver. A maximum a posteriori (MAP) decoder is used at the receiver to correct for cycle slip. Phase errors of 180 degrees may be detected by independently encoding odd and even bits prior to Gray mapping, and identifying errors in decoding odd numbered bits at the receiver.
Tue, 30 Dec 2014 08:00:00 ESTCircuit for processing an input signal based on at least one reference signal, comprising a phase locked loop demodulator configured to receive a speed control signal and said input signal and further configured to follow a frequency and/or a phase of said input signal at a speed, wherein said speed depends on said speed control signal; and a reference signal detector configured to determine said at least one reference signal and to set said speed by outputting said speed control signal to said phase locked loop demodulator, wherein, if said reference signal detector detects said at least one reference signal, said reference signal detector decreases said speed.
Tue, 02 Dec 2014 08:00:00 ESTA new coded continuous phase modulation (CPM) scheme is proposed to enhance physical layer performance of the current DVB-RCS standard for a satellite communication system. The proposed CPM scheme uses a phase pulse design and combination of modulation parameters to shape the power spectrum of CPM signal in order to improve resilience to adjacent channel interference (ACI). Additionally, it uses a low complexity binary convolutional codes and S-random bit interleaving. Phase response using the proposed CPM scheme is a weighted average of the conventional rectangular and raised-cosine responses and provides optimum response to minimize frame error rate for a given data rate.
Tue, 02 Dec 2014 08:00:00 ESTSome embodiments of the invention relate to a DC offset correction circuit comprising a feedback loop having a DAC controlled by a reconfigurable ADC, which determines (e.g., tracks) the mean value of a modulated input signal. The circuit operates according to two phase process. In a first “pre-modulation” tracking phase, an input signal is tracked by the ADC, which is configured to output the input signal's mean value as a digital code equivalent to the input mean value. The output of the ADC is provided to a DAC, which provides an analog representation of the mean value to an adder that subtracts the mean value from the modulated input signal to generate a bipolar adjusted input signal. In a second “modulation” phase, the estimated mean value is held constant, so that the bipolar adjusted input signal may be provided to an activated modulation circuit for improved system performance.
Tue, 18 Nov 2014 08:00:00 ESTA signal generator for a transmitter or a receiver for transmitting or receiving RF-signals according to a given communication protocol includes an oscillator and a mismatch compensator. The oscillator is configured to provide a signal generator output signal having a signal generator output frequency and comprises a fine tuning circuit for providing a fine adjustment of the signal generator output frequency based on a fine tuning signal and a coarse tuning circuit for providing a course adjustment of the signal generator output frequency based on a coarse tuning signal. The mismatch compensator is configured to receive the signal generator output signal and compensate a frequency mismatch between a desired signal generator output frequency and the signal generator output frequency generated by the oscillator by providing the fine tuning signal for changing the state of the fine tuning circuit of the oscillator and by providing the coarse tuning signal for changing a state of the coarse tuning circuit of the oscillator. The mismatch compensator provides the coarse tuning signal during a guard period defined in the given communication protocol, during which no RF-signals are transmitted by the transmitter or no RF-signals are to be received by the receiver, such that the state of the coarse tuning circuit is changed within the guard period.
Tue, 11 Nov 2014 08:00:00 ESTDisclosed herein is a demodulator, including: a splitting/matching section for carrying out a matching process of making the amplitude and phase of a first modulated signal match respectively the amplitude and phase of a second modulated signal; and a demodulation section for generating a demodulated signal on the basis of the first modulated signal and the second modulated signal, which have been subjected to the matching process carried out by the splitting/matching section, wherein the splitting/matching section has a splitting section, a first matching section, and a second matching section, the first circuit-element constants determining the first input impedance of the first matching section and the second circuit-element constants determining the second input impedance of the second matching section are set at values determined in advance in order to make the first input impedance equal to the second input impedance.
Tue, 04 Nov 2014 08:00:00 ESTA device for detecting a PWM wave, comprising: a PWM wave generating module, configured to generate the PWM wave; a detecting module coupled to the PWM wave generating module, configured to receive the PWM wave and to determine an electric level of the PWM wave; a timer coupled to the detecting module, configured to start a counting when the detecting module receives the PWM wave, and to interrupt the counting when the counting reaches a predetermined value, the detecting module determining whether the electric level of the PWM wave is a high electric level or a low electric level when the counting is interrupted; and a calculating module coupled to the detecting module, configured to calculate a duty ratio of the PWM wave based on a number of high electric level and a number of low electric level of the PWM wave determined within one period of the PWM wave.
Tue, 14 Oct 2014 08:00:00 EDTProvided is a receiver for processing VSB signal. The receiver includes a first equalizer/decoder unit and a second equalizer/decoder unit. The first equalizer/decoder unit performs a first equalizing operation, first TCM decoding and first RS decoding on a received symbol to output a first dibit. The second equalizer/decoder unit performs a second equalizing operation, second TCM decoding and second RS decoding on the received symbol to output a transport stream. The first dibit is provided as a priori information for a soft-decision operation of the second TCM decoding.
Tue, 07 Oct 2014 08:00:00 EDTAn efficient baseband predistortion linearization method for reducing the spectral regrowth and compensating memory effects in wideband communication systems using effective multiplexing modulation technique such as wideband code division multiple access and orthogonal frequency division multiplexing is disclosed. The present invention is based on the method of piecewise pre-equalized lookup table based predistortion, which is a cascade of a lookup table predistortion and piecewise pre-equalizers.
Tue, 07 Oct 2014 08:00:00 EDTThe envelope detector for detecting an envelope of a digital modulation signal in accordance with an embodiment of the present invention, includes: a mixer configured to receive the digital modulation signal and output a square signal squaring the digital modulation signal when being applied with bias voltage; a bias voltage applying unit configured to apply the bias voltage to the mixer; and a DC blocking capacitor configured to be connected to the mixer to block DC component included in the square signal. In accordance with the embodiment of the present invention, it is possible to provide the envelope detector having the simple structure while having the good receiving sensitivity and the wide dynamic range characteristics and detect the envelope of the modulated signal without transmitting the carrier signal in the transmitter and generating the separate signal in the receiver, thereby saving the costs consumed to implement the transceiver.
Tue, 30 Sep 2014 08:00:00 EDTIn accordance with some embodiments, methods for controlling the second order intercept point in a receiver are provided, the methods comprising: generating an amplitude modulated test tone; causing the test tone to be received by a receiver; determining a characteristic of a second order intercept point of the receiver based on the received test tone; and based on the characteristic, adjusting a parameter of the receiver. In accordance with some embodiments, systems for controlling the second order intercept point in a receiver are provided, the systems comprising: a test tone generator that generates an amplitude modulated test tone; a receiver that receives the test tone; a correlator that determines a characteristic of a second order intercept point of the receiver based on the received test tone; and digital logic that, based on the characteristic, adjusts a parameter of the receiver.
Tue, 30 Sep 2014 08:00:00 EDTOne embodiment of the present invention relates to a combined mixer filter circuit. The circuit includes a sampler, a plurality of filter branches, and a coefficient generator. The sampler is configured to provide a sampled signal by sampling a received signal at a specified rate. The plurality of filter branches has selectable filter coefficients. The plurality of filter branches are configured to receive the sampled signal and generate a mixed and filtered output signal without a separate mixer component. The coefficient generator is coupled to the plurality of filter branches. The coefficient generator is configured to assign filter coefficient values to the selectable filter coefficients to yield a selected mixing function for the mixed filtered output signal.
Tue, 23 Sep 2014 08:00:00 EDTCommunication systems are described that use geometrically shaped constellations that have increased capacity compared to conventional constellations operating within a similar SNR band. In several embodiments, the geometrically shaped is optimized based upon a capacity measure such as parallel decoding capacity or joint capacity. In many embodiments, a capacity optimized geometrically shaped constellation can be used to replace a conventional constellation as part of a firmware upgrade to transmitters and receivers within a communication system. In a number of embodiments, the geometrically shaped constellation is optimized for an Additive White Gaussian Noise channel or a fading channel. In numerous embodiments, the communication uses adaptive rate encoding and the location of points within the geometrically shaped constellation changes as the code rate changes.
Tue, 23 Sep 2014 08:00:00 EDTAn apparatus for demodulating an input signal that includes a frequency detector for tracking a frequency of the input signal, an oscillator and a mixer is disclosed. The input signal and an output signal of the oscillator can constitute the incoming signals for the mixer and the output signal of the mixer can constitute the demodulated input signal, wherein an arithmetic unit is arranged downstream of the frequency detector and upstream of the oscillator, wherein the tracked frequency of the input signal and a predefined second frequency constitute the incoming signals of the arithmetic unit and the arithmetic unit is designed such that it computes a control signal for the oscillator from the tracked frequency of the input signal and the predefined second frequency with the output signal of the oscillator depending on the control signal.
Tue, 09 Sep 2014 08:00:00 EDTA desired signal and interfering signal are transmitted in the same timeslot and on the same frequency using an Adaptive Quadrature Phase Shift Keying (AQPSK) modulated carrier. When the Sub-Channel Power Imbalance Ratio (SCPIR) for the AQPSK modulated carrier is large and favors the interfering signal, the interfering signal is demodulated first to obtain demodulated soft bits. The demodulated soft bits corresponding to the interfering signal are then used to estimate receiver control parameters, such as Doppler shift, frequency offset, timing error, gain, etc. Using the demodulated soft bits corresponding to the interfering signal improves the accuracy of the receiver control parameters when the SCPIR is large, and results in better overall performance of the receiver.
Tue, 09 Sep 2014 08:00:00 EDTThe invention relates to modulation and demodulation circuits, such as envelope detectors used to demodulate amplitude-modulated (AM) signals. By coupling an analog circuit to a port of a digital component, a compact envelope detector can be obtained, which achieves demodulation of AM signals for direct coupling into a digital input port. Accordingly, a compact envelope detector may be used in the data receiving part of a sealed device requiring post-manufacturing data transfer, in combination with additional components that provide electromagnetic coupling, such as inductive, capacitive, or radiative. An example of such a device is a credit card sized authentication token.
Tue, 02 Sep 2014 08:00:00 EDTApparatuses, circuits, and methods are disclosed for reducing or eliminating unintended operation resulting from metastability in data synchronization. In one such example apparatus, a sampling circuit is configured to provide four samples of a data input signal. A first and a second of the four samples are associated with a first edge of a latching signal, and a third and a fourth of the four samples are associated with a second edge of the latching signal. A masking circuit is configured to selectively mask a signal corresponding to one of the four samples responsive to the four samples not sharing a common logic level. The masking circuit is also configured to provide a decision signal responsive to selectively masking or not masking the signal.
Tue, 02 Sep 2014 08:00:00 EDTA receiver unit of a communication device can employ multiple correlators for decoding the access address of a packet received from another communication device. A dynamically determined primary frequency offset is applied to a phase difference signal that is determined from an RF signal that comprises the packet. For each of a plurality of access address decoding chains of the receiver unit, a secondary frequency offset associated with the access address decoding chain is applied to the phase difference signal, the phase difference signal is correlated with a predetermined access address of the communication device, and a resultant correlation output is compared against a correlation threshold. One of the access address decoding chains that generated the correlation output that is greater than the correlation threshold is selected and the packet is demodulated based, at least in part, on the phase difference signal corresponding to the selected access address decoding chain.
Tue, 19 Aug 2014 08:00:00 EDTDemodulation circuits and processes for demodulating touch signals from a touch sensor using the demodulation circuits are provided. The demodulation circuits can include circuitry configured to determine an adjustable phase delay based at least in part on a quadrature component of the touch signal or the phase-adjusted touch signal. The demodulation circuit can further include circuitry for applying the adjustable phase delay to the touch signal to compensate for phase delays in the touch signal caused by the touch sensor and/or other components. The demodulation circuit can dynamically change the adjustable phase delay to compensate for time-varying phase delays caused by the touch sensor and/or other components.
Tue, 12 Aug 2014 08:00:00 EDTA clock and data recovery device receives a serial data stream and produces recovered clock and data signals. The clock and data recovery device operates over a range of frequencies and without use an external reference clock. A first loop supplies a first clock signal to a second loop. The second loop modifies the first clock signal to produce the recovered clock signal and uses the recover clock signal to produce the recovered data signal. The first loop changes the frequency of the first clock signal based on frequency comparison and data transition density metrics.
Tue, 12 Aug 2014 08:00:00 EDTA communication device according to an embodiment of the present invention includes a communication antenna that receives a transmission signal where a spectrum spread signal subjected to a spectrum spread is modulated; an intermediate frequency converting unit that converts the transmission signal received by the communication antenna into an intermediate frequency signal having a predetermined frequency; an analog to digital converting unit that discretizes the intermediate frequency signal and outputs a discretization signal; a noise removing unit that detects a noise other than a normal thermal noise included in the discretization signal and removes the detected noise from the discretization signal; and a demodulating unit that demodulates the spectrum spread signal, based on the discretization signal that is output from the noise removing unit.
Tue, 12 Aug 2014 08:00:00 EDTSystems and methods are disclosed for feeder link configurations to layered modulation. One feeder link system employs feeder link spot beam to antennas in distinct coverage areas to enable frequency reuse. Another system employs narrow beam width feeder link antenna to illuminate individual satellites also enabling frequency reuse. Yet another system uses layered modulation in the feeder link. Another feeder link system employs a higher order synchronous modulation for the satellite feeder link than is used in the layered modulation downlink signals.
Tue, 29 Jul 2014 08:00:00 EDTA demodulator includes a sampler configured to sample a plurality of first amplitude values of a modulated carrier signal using a constant sampling frequency and a plurality of second amplitude values of the modulated carrier signal at different times using the same constant sampling frequency. The constant sampling frequency is equal to a carrier frequency of the modulated carrier signal with a tolerance of +/−1% of the carrier frequency.
Tue, 29 Jul 2014 08:00:00 EDTA digital data signal, such as a digital video signal, is intentionally pre-distorted before being sent over a network. In one embodiment, this pre-distortion may be performed in accordance with a pre-distortion pattern or algorithm which is shared with only intended receivers. The pre-distortion pattern may be used to vary the pre-distortion on a periodic basis, as frequently as on a symbol-by-symbol basis. The pre-distortion function may include distorting the phase and/or the amplitude of the digital signal's modulation.
Tue, 08 Jul 2014 08:00:00 EDTA clock data recovery circuit includes: a demodulation filter that receives a transmission signal transmitted by two orthogonal carrier waves having I and Q phases and executes demodulation to obtain a demodulated wave having an phase and a demodulated wave having a Q phase from the transmission signal; a first determination circuit that determines whether an absolute value of one of the two demodulated waves is greater than an eye opening maximum value at an ideal clock phase of the transmission signal; a second determination circuit that determines whether the one demodulated wave is greater than zero; a third determination circuit that determines whether the other one of the two demodulated waves is greater than zero; and a phase comparison unit that detects whether a phase of a clock signal included in the transmission signal is leading a phase of a data signal included in the transmission signal, based on determination results obtained by the first to third determination circuits.
Tue, 03 Jun 2014 08:00:00 EDTVarious embodiments are directed towards suppressing inter-cell and intra-cell interference. In some embodiments, an intra-cell interference signal for a specified rake finger is received. An inter-cell interference signal is received. The intra-cell interference signals upstream of a chip-level equalizer are suppressed. The inter-cell interference signals upstream of the chip-level equalizer are suppressed.
Tue, 27 May 2014 08:00:00 EDTA method and system is provided for communicating distinct data over a single frequency using on-off keying, a form of amplitude modulation, or phase changes timed to the zero crossing point of the carrier. A data signal is synchronized with the carrier by adding padding bits so that the number of bits is equal to the frequency of the carrier. The carrier is then modified by attenuating the carrier as needed once per cycle. Said carrier is then transmitted. The resulting transmitted carrier carries a number of bits equal to the transmit frequency. At the receive end, the received signal is compared to a sine wave to determine if the incoming signal is at full strength or at reduced strength, allowing for the detection of encoded digital information. In a another embodiment, the phase of the carrier is changed instead of attenuating the carrier, timed to the carrier cycles, once or twice per cycle.
Tue, 20 May 2014 08:00:00 EDTA method and apparatus is provided for reducing interference in a communication system. A feedback-controlled biased inverting limiter is used to reduce interference power by trapping the interfering signal, while passing the wanted signal through to the output. The amplitude trap triples the frequency of a signal component of a particular amplitude, thus shifting it out of the communication band and into the stopband of the receiver or transponder filter. The feedback-controlled biased inverting limiter uses a hard limiter, window comparator, feedback loop, and an exclusive NOR gate to trap the interfering signal, while allowing the wanted signal to pass through to a receiver.
Tue, 20 May 2014 08:00:00 EDTA phase-shift keying (PSK) demodulator and a smart card including the same are disclosed. The PSK demodulator includes a delay circuit and a sampling circuit. The delay circuit generates a plurality of clock signals by delaying the input signal. The sampling circuit samples the input signal in response to the clock signals, and generates output data.
Tue, 20 May 2014 08:00:00 EDTA dynamic adjusting RFID demodulator circuit includes an envelope detector having an input for receiving a modulated RF signal, a fixed reference generator coupled to the input of an RC filter, an RF level dependent signal path adding to the fixed reference level at higher RF energy levels, a comparator having a first input coupled to an output of the envelope detector, a second input coupled to an output of the RC filter, and an output for providing a data output signal.
Tue, 06 May 2014 08:00:00 EDTA method for transmitting, by a transmitting terminal, data to a receiving terminal in a wireless communication system includes: generating a first detection field including symbols modulated by using a BPSK data tone; generating a second detection field including symbols modulated such that an even numbered subcarrier and an odd numbered subcarrier have a phase difference of 90 degrees; generating a data packet including the first detection field, the second detection field, and the data; and transmitting the data packet.
Tue, 29 Apr 2014 08:00:00 EDTAn envelope detector receives an input that is an Amplitude-Modulated (AM) or Amplitude-Shift-Keying (ASK) coded signal. Each channel has a sample switch and a diode that charge an internal sampling capacitor. A hold switch connects the internal sampling capacitor to a summing output capacitor or to a post-processing circuit. A reset switch discharges the internal sampling capacitor after each sample. Two or more channels may be time multiplexed to sample alternate cycles of the input, and then their outputs combined by the summing output capacitor or by the post-processing circuit. The diodes may be reversed to detect the negative envelope rather than the positive envelope. Clocks for the switches may be generated from the input, or may be from a separate clock source. Since the sampling window is open for a whole input cycle, the clock source is insensitive to phase error.
Tue, 29 Apr 2014 08:00:00 EDTA surface treating appliance includes a surface treating head, a hose, and a fan unit for generating a flow of fluid. A flexible duct assembly has a first end and a second end moveable relative to the first end between a first position allowing fluid flow between the hose and the fan unit, and a second position allowing fluid flow between the surface treating head and the fan unit. The duct assembly is connected to a first support which is pivotable about a first axis, and to a second support which is pivotable about a second axis spaced from the first axis. A drive mechanism effects the pivoting movement of the supports about their axes to move the second end of the duct assembly between the first and second positions.
Tue, 15 Apr 2014 08:00:00 EDTA frequency and data synchronization control system through the 8VSB SFN DTx modulation prevents the deterioration of the digitally broadcasted receiving sensitivity caused by a discrepancy of the frequency or data between the receiver of the digital broadcasting signal and the distributed translator or between distributed translators.
Tue, 18 Mar 2014 08:00:00 EDTMethods, systems and software are provided for high order signal modulation based on improved signal constellation and bit labeling designs for enhanced performance characteristics, including decreased power consumption. According to the improved signal constellation and bit labeling designs for enhanced performance characteristics, designs for 8-ary, 16-ary, 32-ary and 64-ary signal constellations are provided. According to an 8-ary constellation, improved bit labeling and bit coordinates are provided for a 1+7APSK signal constellation. According to a 16-ary constellation, improved bit labeling and bit coordinates are provided for a 6+10APSK signal constellation. According to three 32-ary constellations, improved bit labeling and bit coordinates are provided for a 16+16APSK signal constellation and two 4+12+16APSK signal constellations. According to two 64-ary constellations, improved bit labeling and bit coordinates are provided for an 8+16+20+20APSK signal constellation and a 12+16+16+20APSK signal constellation.
Tue, 11 Mar 2014 08:00:00 EDTAdaptive path selection for interference cancellation is provided for wireless communication devices. Signal strength metrics are obtained for each of multiple signal paths. One or more of the signal paths are selected as cancellation candidates in response to determining that the signal paths are associated with a strong interfering path based at least in part on the signal strength metrics for the signal paths and threshold criteria. Cancellation is enabled for an estimated signal generated using the signal paths in response to the signal paths being selected as cancellation candidates.
Tue, 11 Mar 2014 08:00:00 EDTA receiver system for early detection of a segment type of an input signal based on BPSK and DBPSK modulated carriers is provided. The receiver system includes a tuner that converts the input signal into an intermediate frequency (IF) signal, a signal conditioning module that converts the IF signal into a baseband signal, a Frequency Domain Synchronization (FDS) block that detects the segment type of the input signal based on a carrier powers, a Transmission and Multiplexing Configuration Control (TMCC) decode block that performs a decoding operation on the received signal, a channel estimation block that estimates a channel and obtains a channel information. The TMCC decode block uses the channel information obtained from channel estimation block to correct a fast-frequency selective fading on the received signal before the decoding operation.
Tue, 04 Mar 2014 08:00:00 ESTAn I/Q demodulation apparatus and method with phase scanning are provided. The demodulation apparatus includes a ring oscillator, a first latch unit, a decoding unit, a counter unit, a second latch unit, a first arithmetical unit and a second arithmetical unit. The first latch unit samples phase signals outputted from the ring oscillator. The decoding unit decodes the output of the first latch unit to correspondingly generate fine code of a first, a second, a third and a fourth codes. The counter unit counts the phase signals. The second latch unit samples the output of the counter unit to correspondingly generate coarse code of the first, the second, the third and the fourth codes. The first arithmetical unit performs an addition/subtraction operation by using the first code and the second code. The second arithmetical unit performs the addition/subtraction operation by using the third code and the fourth code.
Tue, 25 Feb 2014 08:00:00 ESTA method and apparatus for decoding binary frequency shift key signals in which an exclusive-OR of the sign of a real waveform with a sign of the imaginary waveform at a time shortly after the real (or, alternatively, the imaginary) waveform crosses zero is used to determine a bit represented by the signal. In some embodiments, particularly those in which the bit period is about one-half of the carrier signal frequency, both the real and imaginary waveforms are monitored to detect the zero crossing in order to account for the situation in which data transitions prevent zero-crossings on one of the waveforms.
Tue, 25 Feb 2014 08:00:00 ESTApparatus and methods for QAM modulation are disclosed using dual polar modulation. QAM modulation of a signal is accomplished by translating a QAM signal into two phasors having the same or constant amplitude and then phase shifting one of the phasor by 180 degrees for a differential load. The phasors are then polar modulated such that, when differentially combined in the load through summation or superposition, a QAM modulated symbol results. The use of constant amplitude phasors when power amplified for transmission of QAM modulated signals allows amplifiers to be operated in a saturation mode with greater efficiency than conventional amplifiers used in QAM modulation, which operate in a less efficient linear mode to effect amplitude modulation. Additionally, differential combining of the phasors affords relaxation of the turns of a transformer used in amplifying the phasors.
Tue, 25 Feb 2014 08:00:00 ESTA pulse signal receiving apparatus may include a reception unit that receives a pulse signal modulated by a double-edge modulation scheme, a measurement unit that measures an edge interval of the pulse signal, which has been received by the reception unit, a detection unit that detects a deviation of the edge interval, which has been measured by the measurement unit, for a pulse-width reference value indicating a reference value of a width of the pulse signal, a correction unit that corrects the edge interval, which is to be measured next by the measurement unit, by using the deviation, which has been detected by the detection unit, and a decoding unit that decodes the pulse signal, of which the edge interval has been corrected by the correction unit, so as to output a digital signal.