Tue, 12 Apr 2016 08:00:00 EDTProvided is a novel coated phosphor capable of effectively suppressing the adverse effects of hydrogen sulfide gas generated by the reaction between a sulfur-containing phosphor and moisture in the air. Provided is a sulfur-containing phosphor having a configuration in which ZnO compound containing Zn and O is present on the surface of a sulfur-containing phosphor having a host material which includes sulfur.
Tue, 23 Feb 2016 08:00:00 ESTAn object is to manufacture and provide a highly reliable semiconductor device including a thin film transistor with stable electric characteristics. In a method for manufacturing a semiconductor device including a thin film transistor in which a semiconductor layer including a channel formation region serves as an oxide semiconductor film, heat treatment for reducing impurities such as moisture (heat treatment for dehydration or dehydrogenation) is performed after an oxide insulating film serving as a protective film is formed in contact with an oxide semiconductor layer. Then, the impurities such as moisture, which exist not only in a source electrode layer, in a drain electrode layer, in a gate insulating layer, and in the oxide semiconductor layer but also at interfaces between the oxide semiconductor film and upper and lower films which are in contact with the oxide semiconductor layer, are reduced.
Tue, 16 Feb 2016 08:00:00 ESTAn embodiment of the present invention provides a TFT array substrate including: a base substrate (1) and thin film transistors. The thin film transistor includes a gate electrode (2), a semiconductor layer (5), a semiconductor protective layer, a source electrode (8) and a drain electrode (9). The semiconductor protective layer is disposed adjacent to the semiconductor layer (5) and includes a composite lamination structure, which includes a protective layer formed of an insulating material capable of preventing de-oxygen of the semiconductor layer (5) and an insulating layer formed of an insulating material to be etched more easily.
Tue, 02 Feb 2016 08:00:00 ESTAn amorphous oxide thin film containing amorphous oxide is exposed to an oxygen plasma generated by exciting an oxygen-containing gas in high frequency. The oxygen plasma is preferably generated under the condition that applied frequency is 1 kHz or more and 300 MHz or less and pressure is 5 Pa or more. The amorphous oxide thin film is preferably exposed by a sputtering method, ion-plating method, vacuum deposition method, sol-gel method or fine particle application method.
Tue, 26 Jan 2016 08:00:00 ESTA low resistivity interface material is provided between a self-aligned vertical heater element and a contact region of a selection device. A phase change chalcogenide material is deposited directly on the vertical heater element. In an embodiment, the vertical heater element in L-shaped, having a curved vertical wall along the wordline direction and a horizontal base. In an embodiment, the low resistivity interface material is deposited into a trench with a negative profile using a PVD technique. An upper surface of the low resistivity interface material may have a tapered bird-beak extension.
Tue, 26 Jan 2016 08:00:00 ESTBy applying an AC pulse to a gate of a transistor which easily deteriorates, a shift in threshold voltage of the transistor is suppressed. However, in a case where amorphous silicon is used for a semiconductor layer of a transistor, the occurrence of a shift in threshold voltage naturally becomes a problem for a transistor which constitutes a part of circuit that generates an AC pulse. A shift in threshold voltage of a transistor which easily deteriorates and a shift in threshold voltage of a turned-on transistor are suppressed by signal input to a gate electrode of the transistor which easily deteriorates through the turned-on transistor. In other words, a structure for applying an AC pulse to a gate electrode of a transistor which easily deteriorates through a transistor to a gate electrode of which a high potential (VDD) is applied, is included.
Tue, 12 Jan 2016 08:00:00 ESTA semiconductor device including a circuit which does not easily deteriorate is provided. The semiconductor device includes a first transistor, a second transistor, a first switch, a second switch, and a third switch. A first terminal of the first transistor is connected to a first wiring. A second terminal of the first transistor is connected to a second wiring. A gate and a first terminal of the second transistor are connected to the first wiring. A second terminal of the second transistor is connected to a gate of the first transistor. The first switch is connected between the second wiring and a third wiring. The second switch is connected between the second wiring and the third wiring. The third switch is connected between the gate of the first transistor and the third wiring.
Tue, 15 Dec 2015 08:00:00 ESTIt is an object to provide a highly reliable semiconductor device with good electrical characteristics and a display device including the semiconductor device as a switching element. In a transistor including an oxide semiconductor layer, a needle crystal group provided on at least one surface side of the oxide semiconductor layer grows in a c-axis direction perpendicular to the surface and includes an a-b plane parallel to the surface, and a portion except for the needle crystal group is an amorphous region or a region in which amorphousness and microcrystals are mixed. Accordingly, a highly reliable semiconductor device with good electrical characteristics can be formed.
Tue, 08 Dec 2015 08:00:00 ESTTo provide a semiconductor device which has transistor characteristics with little variation and includes an oxide semiconductor. The semiconductor device includes an insulating film over a conductive film and an oxide semiconductor film over the insulating film. The oxide semiconductor film includes a first oxide semiconductor layer, a second oxide semiconductor layer over the first oxide semiconductor layer, and a third oxide semiconductor layer over the second oxide semiconductor layer. The energy level of a bottom of a conduction band of the second oxide semiconductor layer is lower than those of the first and third oxide semiconductor layers. An end portion of the second oxide semiconductor layer is positioned on an inner side than an end portion of the first oxide semiconductor layer.
Tue, 01 Dec 2015 08:00:00 ESTThe silicon nitride layer 910 formed by plasma CVD using a gas containing a hydrogen compound such as silane (SiH4) and ammonia (NH3) is provided on and in direct contact with the oxide semiconductor layer 905 used for the resistor 354, and the silicon nitride layer 910 is provided over the oxide semiconductor layer 906 used for the thin film transistor 355 with the silicon oxide layer 909 serving as a barrier layer interposed therebetween. Therefore, a higher concentration of hydrogen is introduced into the oxide semiconductor layer 905 than into the oxide semiconductor layer 906. As a result, the resistance of the oxide semiconductor layer 905 used for the resistor 354 is made lower than that of the oxide semiconductor layer 906 used for the thin film transistor 355.
Tue, 24 Nov 2015 08:00:00 ESTMethods, devices, and systems are provided for a select device that can include a semiconductive stack of at least one semiconductive material formed on a first electrode, where the semiconductive stack can have a thickness of about 700 angstroms (Å) or less. Each of the at least one semiconductive material can have an associated band gap of about 4 electron volts (eV) or less and a second electrode can be formed on the semiconductive stack.
Tue, 24 Nov 2015 08:00:00 ESTA protective circuit includes a non-linear element which includes a gate electrode, a gate insulating layer covering the gate electrode, a first oxide semiconductor layer overlapping with the gate electrode over the gate insulating layer, and a first wiring layer and a second wiring layer whose end portions overlap with the gate electrode over the first oxide semiconductor layer and in which a conductive layer and a second oxide semiconductor layer are stacked. Over the gate insulating layer, oxide semiconductor layers with different properties are bonded to each other, whereby stable operation can be performed as compared with Schottky junction. Thus, the junction leakage can be reduced and the characteristics of the non-linear element can be improved.
Tue, 24 Nov 2015 08:00:00 ESTA microelectronic assembly includes a first component with first conductive elements; a second component with second conductive elements; a bond metal; and an underfill layer. The posts have a height above the respective surface from which the posts project. A bond metal can be disposed between respective pairs of conductive elements, each pair including at least one of the posts and at least one of the first or second conductive elements confronting the at least one post. The bond metal can contact edges of the posts along at least one half the height of the posts. An underfill layer contacts and bonds the first and second surfaces of the first and second components. A residue of the underfill layer may be present at at least one interfacial surfaces between at least some of the posts and the bond metal or may be present within the bond metal.
Tue, 27 Oct 2015 08:00:00 EDTSome embodiments include transistors having a channel region under a gate, having a source/drain region laterally spaced from the channel region by an active region, and having one or more dielectric features extending through the active region in a configuration which precludes any straight-line lateral conductive path from the channel region to the source/drain region. The dielectric features may be spaced-apart islands in some configurations. The dielectric features may be multi-branched interlocking structures in some configurations.
Tue, 20 Oct 2015 08:00:00 EDTThe present invention has an object of providing a light-emitting device including an OLED formed on a plastic substrate, which prevents degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light-emitting layer in the OLED (“barrier films”) and a film having a smaller stress than the barrier films (“stress relaxing film”), the film being interposed between the barrier films, are provided. Owing to a laminate structure, if a crack occurs in one of the barrier films, the other barrier film(s) can prevent moisture or oxygen from penetrating into the organic light emitting layer. The stress relaxing film, which has a smaller stress than the barrier films, is interposed between the barrier films, making it possible to reduce stress of the entire sealing film. Therefore, a crack due to stress hardly occurs.
Tue, 13 Oct 2015 08:00:00 EDTA solder bump structure for a ball grid array (BGA) includes at least one under bump metal (UBM) layer and a solder bump formed over the at least one UBM layer. The solder bump has a bump width and a bump height and the ratio of the bump height over the bump width is less than 1.
Tue, 06 Oct 2015 08:00:00 EDTWhen a semiconductor substrate of a semiconductor device is viewed from above, an isolation region, an IGBT region, and a diode region are all formed adjacent to each other. A deep region that is connected to a body region and an anode region is formed in the isolation region. A drift region is formed extending across the isolation region, the IGBT region, and the diode region, inside the semiconductor substrate. A collector region that extends across the isolation region, the IGBT region and the diode region, and a cathode region positioned in the diode region, are formed in a region exposed on a lower surface of the semiconductor substrate. A boundary between the collector region and the cathode region is in the diode region, in a cross-section that cuts across a boundary between the isolation region and the diode region, and divides the isolation region and the diode region. The collector region formed in the isolation region has a higher dopant impurity concentration than the collector region in the IGBT region.
Tue, 06 Oct 2015 08:00:00 EDTA semiconductor film having an impurity region to which at least an n-type or p-type impurity is added and a wiring are provided. The wiring includes a diffusion prevention film containing a conductive metal oxide, and a low resistance conductive film over the diffusion prevention film. In a contact portion between the wiring and the semiconductor film, the diffusion prevention film and the impurity region are in contact with each other. The diffusion prevention film is framed in such a manner that a conductive film is exposed to plasma generated from a mixed gas of an oxidizing gas and a halogen-based gas to form an oxide of a metal material contained in the conductive film, the conductive film in which the oxide of the metal material is formed is exposed to an atmosphere containing water to be fluidized, and the fluidized conductive film is solidified.
Tue, 29 Sep 2015 08:00:00 EDTA light-emitting element includes a first electrode, a first light-emitting layer formed over the first electrode, a second light-emitting layer formed on and in contact with the first light-emitting layer to be in contact therewith, and a second electrode formed over the second light-emitting layer. The first light-emitting layer includes a first light-emitting substance and a hole-transporting organic compound, and the second light-emitting layer includes a second light-emitting substance and an electron-transporting organic compound. Substances are selected such that a difference in LUMO levels between the first light-emitting substance, the second light-emitting substance, and the electron-transporting organic compound is 0.2 eV or less, a difference in HOMO levels between the hole-transporting organic compound, the first light-emitting substance, and the second light-emitting substance is 0.2 eV or less, and a difference in LUMO levels between the hole-transporting organic compound and the first light-emitting substance is greater than 0.3 eV.
Tue, 15 Sep 2015 08:00:00 EDTA semiconductor device which includes a thin film transistor having an oxide semiconductor layer and excellent electrical characteristics is provided. Further, a method for manufacturing a semiconductor device in which plural kinds of thin film transistors of different structures are formed over one substrate to form plural kinds of circuits and in which the number of steps is not greatly increased is provided. After a metal thin film is formed over an insulating surface, an oxide semiconductor layer is formed thereover. Then, oxidation treatment such as heat treatment is performed to oxidize the metal thin film partly or entirely. Further, structures of thin film transistors are different between a circuit in which emphasis is placed on the speed of operation, such as a logic circuit, and a matrix circuit.
Tue, 08 Sep 2015 08:00:00 EDTIt is an object to manufacture a highly reliable semiconductor device including a thin film transistor whose electric characteristics are stable. An insulating layer which covers an oxide semiconductor layer of the thin film transistor contains a boron element or an aluminum element. The insulating layer containing a boron element or an aluminum element is formed by a sputtering method using a silicon target or a silicon oxide target containing a boron element or an aluminum element. Alternatively, an insulating layer containing an antimony (Sb) element or a phosphorus (P) element instead of a boron element covers the oxide semiconductor layer of the thin film transistor.
Tue, 08 Sep 2015 08:00:00 EDTSemiconductor devices including a stressor in a recess and methods of forming the semiconductor devices are provided. The methods may include forming a trench in an active region and the trench may include a notched portion of the active region. The methods may also include forming an embedded stressor in the trench. The embedded stressor may include a lower semiconductor layer and an upper semiconductor layer, which has a width narrower than a width of the lower semiconductor layer. A side of the upper semiconductor layer may not be aligned with a side of the lower semiconductor layer and an uppermost surface of the upper semiconductor layer may be higher than an uppermost surface of the active region.
Tue, 08 Sep 2015 08:00:00 EDTA semiconductor device, includes a semiconductor substrate, a first interconnect layer formed over the semiconductor substrate, a gate electrode formed in the first interconnect layer, a gate insulating film formed over the gate electrode, a second interconnect layer formed over the gate insulating film, an oxide semiconductor layer formed in the second interconnect layer, and a via formed in the second interconnect layer and connected to the oxide semiconductor layer. The gate electrode, the gate insulating film and the oxide semiconductor layer overlap in a plan view.
Tue, 25 Aug 2015 08:00:00 EDTAn object is to provide a semiconductor device including an oxide semiconductor film, which has stable electrical characteristics and high reliability. A stack of first and second material films is formed by forming the first material film (a film having a hexagonal crystal structure) having a thickness of 1 nm to 10 nm over an insulating surface and forming the second material film having a hexagonal crystal structure (a crystalline oxide semiconductor film) using the first material film as a nucleus. As the first material film, a material film having a wurtzite crystal structure (e.g., gallium nitride or aluminum nitride) or a material film having a corundum crystal structure (α-Al2O3, α-Ga2O3, In2O3, Ti2O3, V2O3, Cr2O3, or α-Fe2O3) is used.
Tue, 25 Aug 2015 08:00:00 EDTAn electronic device includes a silicon carbide layer including an n-type drift region therein, a contact forming a junction, such as a Schottky junction, with the drift region, and a p-type junction barrier region on the silicon carbide layer. The p-type junction barrier region includes a p-type polysilicon region forming a P-N heterojunction with the drift region, and the p-type junction barrier region is electrically connected to the contact. Related methods are also disclosed.
Tue, 11 Aug 2015 08:00:00 EDTAccording to one embodiment, a semiconductor light emitting device includes a first semiconductor layer, a light emitting unit, a second semiconductor layer, a reflecting electrode, an oxide layer and a nitrogen-containing layer. The first semiconductor layer is of a first conductivity type. The light emitting unit is provided on the first semiconductor layer. The second semiconductor layer is provided on the light emitting unit and is of a second conductivity type. The reflecting electrode is provided on the second semiconductor layer and includes Ag. The oxide layer is provided on the reflecting electrode. The oxide layer is insulative and has a first opening. The nitrogen-containing layer is provided on the oxide layer. The nitrogen-containing layer is insulative and has a second opening communicating with the first opening.
Tue, 11 Aug 2015 08:00:00 EDTProvided are three-dimensional nonvolatile memory devices and methods of fabricating the same. The memory devices include semiconductor pillars penetrating interlayer insulating layers and conductive layers alternately stacked on a substrate and electrically connected to the substrate and floating gates selectively interposed between the semiconductor pillars and the conductive layers. The floating gates are formed in recesses in the conductive layers.
Tue, 11 Aug 2015 08:00:00 EDTA non-linear element (e.g., a diode) with small reverse saturation current is provided. A non-linear element includes a first electrode provided over a substrate, an oxide semiconductor film provided on and in contact with the first electrode, a second electrode provided on and in contact with the oxide semiconductor film, a gate insulating film covering the first electrode, the oxide semiconductor film, and the second electrode, and a third electrode provided in contact with the gate insulating film and adjacent to a side surface of the oxide semiconductor film with the gate insulating film interposed therebetween or a third electrode provided in contact with the gate insulating film and surrounding the second electrode. The third electrode is connected to the first electrode or the second electrode.
Tue, 11 Aug 2015 08:00:00 EDTA display device comprising TFT elements having satisfactory characteristics and being easy to assemble. In the display device, a pixel emitting red light comprises a red color filter. The red color filter forms a light shielding film for the TFT elements in a driver circuit portion or in a pixel portion.
Tue, 11 Aug 2015 08:00:00 EDTA method and a semiconductor device for incorporating defect mitigation structures are provided. The semiconductor device comprises a substrate, a defect mitigation structure comprising a combination of layers of doped or undoped group IV alloys and metal or non-metal nitrides disposed over the substrate, and a device active layer disposed over the defect mitigation structure. The defect mitigation structure is fabricated by depositing one or more defect mitigation layers comprising a substrate nucleation layer disposed over the substrate, a substrate intermediate layer disposed over the substrate nucleation layer, a substrate top layer disposed over the substrate intermediate layer, a device nucleation layer disposed over the substrate top layer, a device intermediate layer disposed over the device nucleation layer, and a device top layer disposed over the device intermediate layer. The substrate intermediate layer and the device intermediate layer comprise a distribution in their compositions along a thickness coordinate.
Tue, 04 Aug 2015 08:00:00 EDTIt is an object to provide a transistor having a new multigate structure in which operating characteristics and reliability are improved. In a transistor having a multigate structure, which includes two gate electrodes electrically connected to each other and a semiconductor layer including two channel regions connected in series formed between a source region and a drain region, and a high concentration impurity region is formed between the two channel regions; the channel length of the channel region adjacent to the source region is longer than the channel length of the channel region adjacent to the drain region.
Tue, 28 Jul 2015 08:00:00 EDTVarious embodiments related to a compact device package are disclosed herein. In some arrangements, a flexible substrate can be coupled to a carrier having walls angled relative to one another. The substrate can be shaped to include two bends. First and second integrated device dies can be mounted on opposite sides of the substrate between the two bends in various arrangements.
Tue, 21 Jul 2015 08:00:00 EDTA light emitting device including a light emitting structure having a first conduction type semiconductor layer, an active layer, and a second conduction type semiconductor layer, a transparent conductive layer disposed on the light emitting structure, a metal filter having an irregular pattern disposed between the light emitting structure and the transparent conductive layer, and openings disposed between the irregular patterns in the metal filter.
Tue, 21 Jul 2015 08:00:00 EDTA semiconductor device includes wiring layers formed over a semiconductor wafer, a via-layer between the wiring layers, conductive films in the wiring layers, and a via-plug in the via-layer connecting the conductive films of the wiring layers above and below, a scribe region at an outer periphery of a chip region along an edge of the semiconductor substrate and including a pad region in the vicinity of the edge, the pad region overlapping the conductive films of the plurality of wiring layers in the plan view, the plurality of wiring layers including first second wiring layers, the conductive film of the first wiring layer includes a first conductive pattern formed over an entire surface of said pad region in a plan view, and the conductive film of the second wiring layer includes a second conductive pattern formed in a part of the pad region in a plan view.
Tue, 14 Jul 2015 08:00:00 EDTAccording to one embodiment, a semiconductor light emitting device includes a stacked structure body, a first electrode, a second electrode, and a dielectric body part. The stacked structure body includes a first semiconductor layer, having a first portion and a second portion juxtaposed with the first portion, a light emitting layer provided on the second portion, a second semiconductor layer provided on the light emitting layer. The first electrode includes a contact part provided on the first portion and contacting the first layer. The second electrode includes a first part provided on the second semiconductor layer and contacting the second layer, and a second part electrically connected with the first part and including a portion overlapping with the contact part when viewed from the first layer toward the second layer. The dielectric body part is provided between the contact part and the second part.
Tue, 14 Jul 2015 08:00:00 EDTThe band tail state and defects in the band gap are reduced as much as possible, whereby optical absorption of energy which is in the vicinity of the band gap or less than or equal to the band gap is reduced. In that case, not by merely optimizing conditions of manufacturing an oxide semiconductor film, but by making an oxide semiconductor to be a substantially intrinsic semiconductor or extremely close to an intrinsic semiconductor, defects on which irradiation light acts are reduced and the effect of light irradiation is reduced essentially. That is, even in the case where light with a wavelength of 350 nm is delivered at 1×1013 photons/cm2·sec, a channel region of a transistor is formed using an oxide semiconductor, in which the absolute value of the amount of the variation in the threshold voltage is less than or equal to 0.65 V.
Tue, 14 Jul 2015 08:00:00 EDTA package includes a first die and a second die underlying the first die and in a same first die stack as the first die. The second die includes a first portion overlapped by the first die, and a second portion not overlapped by the first die. A first Thermal Interface Material (TIM) is over and contacting a top surface of the first die. A heat dissipating lid has a first bottom surface contacting the first TIM. A second TIM is over and contacting the second portion of the second die. A heat dissipating ring is over and contacting the second TIM.
Tue, 07 Jul 2015 08:00:00 EDTAn object is to manufacture a semiconductor device with high reliability by providing the semiconductor device including an oxide semiconductor with stable electric characteristics. In a transistor including an oxide semiconductor layer, a gallium oxide film is used for a gate insulating layer and made in contact with an oxide semiconductor layer. Further, gallium oxide films are provided so as to sandwich the oxide semiconductor layer, whereby reliability is increased. Furthermore, the gate insulating layer may have a stacked structure of a gallium oxide film and a hafnium oxide film.
Tue, 07 Jul 2015 08:00:00 EDTThere is provided a substrate for light-emitting element, including a mounting surface on which a light-emitting element is to be mounted, the mounting surface being one of two opposed main surfaces of the substrate. The substrate of the present invention is provided with a protection element for the light-emitting element, the protection element comprising a voltage-dependent resistive layer embedded in a body of the substrate, and comprising a first electrode and a second electrode each of which is in connection with the voltage-dependent resistive layer wherein the light-emitting element is to be mounted such that it is positioned in an overlapping relation with the voltage-dependent resistive layer.
Tue, 07 Jul 2015 08:00:00 EDTThe present invention relates to a film for flip chip type semiconductor back surface to be formed on a back surface of a semiconductor element flip chip-connected to an adherend, the film for flip chip type semiconductor back surface containing an inorganic filler in an amount within a range of 70% by weight to 95% by weight based on the whole of the film for flip chip type semiconductor back surface.
Tue, 30 Jun 2015 08:00:00 EDTAn organic light emitting diode (OLED) display a includes: a substrate; an organic light emitting element on the substrate and including a first electrode, a light emission layer, and a second electrode; and an encapsulation layer on the substrate while covering the organic light emitting element. The encapsulation layer includes an organic layer and an inorganic layer. A mixed area, where organic materials forming the organic layer and inorganic materials forming the inorganic layer co-exist along a plane direction of the encapsulation layer, is formed at the boundary between the organic layer and the inorganic layer.
Tue, 30 Jun 2015 08:00:00 EDTA semiconductor light-emitting device includes a lamination of semiconductor layers including a first layer of a first conductivity type, an active layer, and a second layer of a second conductivity type; a transparent conductive film formed on a principal surface of the lamination and having an opening; a pad electrode formed on part the opening; and a wiring electrode connected with the pad electrode, formed on another part of the opening while partially overlapping the transparent conductive film; wherein contact resistance between the transparent conductive film and the lamination is larger than contact resistance between the wiring electrode and the lamination. Field concentration at the wiring electrode upon application of high voltage is mitigated by the overlapping transparent conductive film.
Tue, 30 Jun 2015 08:00:00 EDTA display device includes a pixel portion including a plurality of pixels each including a first transistor, a second transistor, and a light-emitting element, in which a gate of the first transistor is electrically connected to a scan line, one of a source and a drain of the first transistor is electrically connected to a signal line, and the other of them is electrically connected to a gate of the second transistor; one of a source and a drain of the second transistor is electrically connected to a power supply line and the other of them is electrically connected to the light-emitting element, and the first transistor includes an oxide semiconductor layer. A period when the display device displays a still image includes a period in which output of a signal to all the scan lines in the pixel portion is stopped.
Tue, 16 Jun 2015 08:00:00 EDTAn organic light emitting display device includes a light shield layer formed on a substrate and a buffer layer formed on an entire surface of the substrate, an oxide semiconductor layer and first electrode formed on the buffer layer, a gate insulation film and gate electrode formed on the oxide semiconductor layer while being deposited to expose both edges of the oxide semiconductor layer, an interlayer insulation film formed to expose both the exposed edges of the oxide semiconductor layer and the first electrode, source and drain electrodes connected with one edge and the other edge of the oxide semiconductor layer, respectively, and a protective film formed to cover the source and drain electrodes while exposing a region of the first electrode so as to define a luminescent region and a non-luminescent region.
Tue, 16 Jun 2015 08:00:00 EDTA light emitting device package is provided comprising a light emitting device including at least one light emitting diode and a body including a first lead frame on which the light emitting device is mounted and a second lead frame spaced apart from the first lead frame, wherein at least one of the first and second lead frames is extending to a bending region in a first direction by a predetermined length on the basis of an outer surface of the body and is bent in a second direction intersecting the first direction.
Tue, 16 Jun 2015 08:00:00 EDTAn object is to provide a semiconductor device using an oxide semiconductor having stable electric characteristics and high reliability. A transistor including the oxide semiconductor film in which a top surface portion of the oxide semiconductor film is provided with a metal oxide film containing a constituent similar to that of the oxide semiconductor film and functioning as a channel protective film is provided. In addition, the oxide semiconductor film used for an active layer of the transistor is an oxide semiconductor film highly purified to be electrically i-type (intrinsic) by heat treatment in which impurities such as hydrogen, moisture, a hydroxyl group, or a hydride are removed from the oxide semiconductor and oxygen which is a major constituent of the oxide semiconductor and is reduced concurrently with a step of removing impurities is supplied.
Tue, 09 Jun 2015 08:00:00 EDTAn organic EL device includes a first substrate including a cathode layer (a first electrode layer), an organic layer formed on the cathode layer, an anode layer (a second electrode layer) formed on the organic layer, and a second substrate joined to the anode layer by an adhesive layer. The anode layer is provided so as to extend to an outer peripheral side of a region where the organic layer is present, the second substrate and the adhesive layer are not present in a portion which faces a region at an outer peripheral side of the extended anode layer, and the cathode layer and the extended anode layer are exposed from the second substrate to constitute a cathode taking-out portion and an anode taking-out portion, respectively.
Tue, 09 Jun 2015 08:00:00 EDTGroup III nitride based light emitting devices and methods of fabricating Group III nitride based light emitting devices are provided. The emitting devices include an n-type Group III nitride layer, a Group III nitride based active region on the n-type Group III nitride layer and comprising at least one quantum well structure, a Group III nitride layer including indium on the active region, a p-type Group III nitride layer including aluminum on the Group III nitride layer including indium, a first contact on the n-type Group III nitride layer and a second contact on the p-type Group III nitride layer. The Group III nitride layer including indium may also include aluminum.
Tue, 09 Jun 2015 08:00:00 EDTAccording to embodiments of the invention, a TFT array substrate, a manufacturing method of the TFT array substrate and a display device are provided. The method comprises: depositing a metal film on a substrate, and forming a gate electrode and a gate line; forming a gate insulating layer and a passivation layer on the substrate; depositing a transparent conductive layer, a first source/drain metal layer and a first ohmic contact layer, and forming a drain electrode, a pixel electrode, a data line, and a first ohmic contact layer pattern provided on the drain electrode; and depositing a semiconductor layer, a second ohmic contact layer and a second source/drain metal layer, and forming a source electrode, a second ohmic contact layer pattern provided below the source electrode, and a semiconductor channel between the source electrode and the drain electrode.
Tue, 09 Jun 2015 08:00:00 EDTAn interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.